Savin LD132c Manual de usuario descargar pdf (Pagina 110)

i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 9

110 Freescale Semiconductor

• ”Tx” and “Rx” refer, respectively, to the transmit and receive sections of the SSI.

• For internal frame sync operation using external clock, the FS timing is the same as that of Tx data (for example, during AC97

mode of operation).

3.7.18 Touchscreen ADC Electrical Specifications and Timing

This section describes the electrical specifications, operation modes, and timing of the touchscreen ADC.

3.7.18.1 ADC Electrical Specifications

Table 85 shows the electrical specifications for the touchscreen ADC.

Table 85. Touchscreen ADC Electrical Specifications

Parameter Conditions Min. Typ. Max. Unit

ADC

Input sampling capacitance (

) No pin/pad capacitance included — 2 — pF

Resolution — 12 bits

Analog Bias

Resistance value between

ref

and

agndref

——1.6—kΩ

Timing Characteristics

Sampling rate (fs) — — — 125 kHz

Internal ADC/TSC clock frequency — — — 1.75 MHz

Multiplexed inputs — 8 —

Data latency — 12.5 clk

cycles

Power-up time

—14clk

cycles

clk falling edge to sampling delay

(tsd)

—258ns

soc input setup time before clk rising

edge (tsocst)

—0.513ns

soc input hold time after clk rising

edge (tsochld)

—236ns

eoc delay after clk rise edge (teoc) With a 250 pF load 2 7 10 ns

Valid data out delay after eoc rise

edge (tdata)

With a 250 pF load 5 8 13 ns

Power Supply Requirements

Current consumption

NVCC_ADC

———2.1

0.5

1 2 ... 105 106 107 108 109 110 111 112 113 114 115 ... 152 153

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